| 论文编号: | 172511O120100174 |
| 第一作者所在部门: | 三室一组 |
| 论文题目: | 改进型高速低功耗负电位电平位移电路 |
| 论文题目英文: | |
| 作者: | 刘明 |
| 论文出处: | EI收录 |
| 刊物名称: | |
| 年: | 2010 |
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| 影响因子: | 0 |
| 摘要: | An improved negative level shifter with high speed and low power consumption is presented. To reduce the switching delay and power consumption, a boost circuit is designed and additional charging current paths are introduced in the improved level shifter. The circuit has been designed in 130nm triple-well standard CMOS technology with a nominal power supply VDD of 1.5V and a negative voltage of -4.5V. Simulation results show that the switching delay and power consumption have been significantly reduced by roughly 78% and 51%, respectively，compared with the conventional negative level shifter. |
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| 备注: | International Conference on Solid-State and Integrated Circuit Technology |
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