| 论文编号: | 172511O120130129 |
| 作者: | 唐兆云 |
| 刊物名称: | IEEE ELECTRON DEVICE LETTERS |
| 年: | 2013-03-14 |
| 期: | 34 |
| 页: | 1488 |
| 联系作者: | 唐兆云 |
| 摘要: | Abstract—TaN as wet etch stop layer is implemented in dual metal HKMG last integration CMOSFETs. Impacts of TaN on device characteristics are investigated. With thicker TaN, work functions of NFET and PFET both shift to mid-gap position. Sensitivities of TaN thickness on Vfb are obtained with 81mV/nm and -114mV/nm for NFET and PFET respectively. It could be served as an important enhancement tuning factor for threshold voltage (Vth) adjustment in CMOSFETs due to TaN contributions on Vth values are in the same direction. With CMOS technology moving to below 22nm node, it is crucial to control amount of wet etch of TaN layer, otherwise device characteristics would be impacted and double hump exists. |
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