| 论文编号: | 172511O120130065 |
| 第一作者所在部门: | |
| 论文题目: | 一种用于数字助听器SOC的低功耗高性能可配置自动增益环路 |
| 论文题目英文: | |
| 作者: | 陈铖颖 |
| 论文出处: | |
| 刊物名称: | Chinese Journal of Semiconductors |
| 年: | 2013-10-10 |
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| 期: | 10 |
| 页: | 105011-1 |
| 联系作者: | 陈铖颖 |
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| 摘要: | A low-power, configurable auto-gain control loop for a digital hearing aid system on a chip (SoC) is presented. By adopting a mixed-signal feedback control structure and peak detection and judgment, it can work in automatic gain or variable gain control modes through a digital signal processing unit. A noise-reduction and dynamic range (DR) improvement technique is also used to ensure the DR of the circuit in a low-voltage supply.The circuit isimplemented in an SMIC 0.13 1P8M CMOS process. The measurement results show that in a 1 V power supply, 1.6 kHz input frequency and 200 mVpp, the SFDR is 74.3 dB, the THD is 66.1 dB, and the total power is 89 , meeting the application requirements of hearing aid SoCs. |
| 英文摘要: | |
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