| 论文编号: | 172511O120100266 |
| 第一作者所在部门: | 二室四组 |
| 论文题目: | 基于SOI的FPGA的互联网络的设计和验证 |
| 作者: | 王剑 |
| 论文出处: | EI收录 |
| 刊物名称: | MNDSCS2010 |
| 年: | 2010 |
| 影响因子: | 0 |
| 摘要: | In designing an FPGA based on a 0.5 micron SOI-CMOS technology we experienced a crucial task of providing a robust programmable interconnection network to drive long-line and global signals through the entire chip. In this paper, we focus on the design of an efficient long-line signal interconnect network targeting for high speed and low power consumption of the circuit operation in a tile-based FPGA. |
| 备注: | 2010 International Conference on Micro Nano Devices, Structure and Computing System |
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