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  • 姓名: 杨冠华
  • 性别: 男
  • 职称: 副研究员
  • 职务: 
  • 学历: 博士
  • 电话: 
  • 传真: 
  • 电子邮件: yangguanhua@ime.ac.cn
  • 所属部门: 重点实验室
  • 通讯地址: 北京市朝阳区北土城西路3号

    简  历:

  • 教育背景

    2016.09-2019.06,中国科学院大学,微电子学与固体电子学,博士。

    2012.08-2013.11,香港科技大学,集成电路设计,硕士。

    2007.09-2011.06,西北大学,电子科学与技术,本科。

    工作简历

    2013.12-2015.06,Synopsys.inc,模拟集成电路工程师

    2015.07-2016.08,中国科学院微电子研究所,研究实习员。

    2019.07-2022.01,中国科学院微电子研究所,助理研究员

    2022.02-至今,中国科学院微电子研究所,副研究员。

    社会任职:

    研究方向:

  • 先进DRAM存储器、氧化物薄膜晶体管、三维集成技术

    承担科研项目情况:

  • 1.国家重点研发计划青年科学家项目,2023YFB3611600,2023.11-2026.10,项目负责人。

    2.中国科学院青年创新促进会,2022116,2022-2026,项目负责人。

    3.国家自然科学基金青年项目,62004214,2021.01-2023.12,项目负责人。


    代表论著:

  • [1]Menggan Liu#, Zhi Li#, Wendong Lu#, Kaifei Chen, Jiebin Niu, Fuxi Liao, Zijing Wu, Congyan Lu, 

    Weizeng Li, Di Geng, Nianduan Lu, Chunmeng Dou*, Guanhua Yang*, Ling Li* and Ming Liu, “First 

    Demonstration of Monolithic Three-dimensional Integration of Ultra-high Density Hybrid IGZO/Si SRAM and 

    IGZO 2T0C DRAM Achieving Record-low Latency (<10ns), Record-low Energy (<10fJ) of Data Transfer and 

    Ultra-long data retention (>5000s)”, 2024 Symposium on VLSI Technology, 2024. *通讯作者. (Best Demo 

    Award in VLSI 2024)

    [2]Zijing Wu, Jiebin Niu, Congyan Lu, Ziheng Bai, Kaifei Chen, Zhenhua Wu, Wendong Lu, Menggan Liu, 

    Fuxi Liao, Di Geng , Nianduan Lu, Guanhua Yang*, and Ling Li,“Contact Length Scaling in Dual-gate IGZO 

    TFTs”, IEEE Electron Device Letters, 2024. *通讯作者.(Popular Article in EDL)

    [3]Kaifei Chen#, Zhengyong Zhu#, Wendong Lu#, Menggan Liu, Fuxi Liao, Zijing Wu, Jiebin Niu, Bok-Moon 

    Kang, Wang Dan, Xie-Shuai Wu, Ming-Xu Liu, Yong Yu, Nan Yang, Gui-Lei Wang, Kan-Yu Cao, Lingfei 

    Wang,Di Geng, Nianduan Lu, Guanhua Yang*, Chao Zhao*, Arokia Nathan, Ling Li* and Ming Liu,“Improved 

    Multi-bit Statistics of Novel Dual-gate IGZO 2T0C DRAM with In-cell VTH Compensation and ΔVSN/ΔVDATA 

    Boosting Technique”, 2023 International Electron Devices Meeting, 2023. *通讯作者.

    [4]Wendong Lu, Congyan Lu, Guanhua Yang*, Menggan Liu, Kaifei Chen, Fuxi Liao, Xinlv Duan , Nianduan 

    Lu, and Ling Li,“Monolithically Stacked Two Layers of a-IGZO-Based Transistors Upon a-IGZO-Based 

    Analog/Logic Circuits”, IEEE Transactions on Electron Devices, 2023. *通讯作者.

    [5]Lihua Xu#, Kaifei Chen#, Zhi Li#, Jingrui Guo, Linfang Wang, Yue Zhao, Shijie Huang, Zhidao Zhou, 

    Chunmeng Dou*, Guanhua Yang*, Lingfei Wang*, Ling Li, Ming Liu, “Reliability-Aware Ultra-Scaled IDG-

    InGaZnO-FET Compact Model to Enable Cross-layer Co-design for Highly Efficient Analog Computing in 

    2T0C-DRAM”, 2023 International Electron Devices Meeting, 2023. *通讯作者.

    [6] Kaifei Chen, Jiebin Niu, Guanhua Yang*, Menggan Liu, Wendong Lu, Fuxi Liao, Kailiang Huang, XinLv 

    Duan, Congyan Lu, Jiawei Wang, Lingfei Wang, Mengmeng Li, Di Geng, Chao Zhao, Guilei Wang, Nianduan 

    Lu, Ling Li* and Ming Liu, “Scaling Dual-Gate Ultra-thin a-IGZO FET to 30 nm Channel Length with Record-

    high G m,max of 559 µS/µm at V DS =1 V, Record-low DIBL of 10 mV/V and Nearly Ideal SS of 63 mV/dec”, 

    2022 IEEE Symposium on VLSI Technology. *通讯作者. (Invited for Demo Session)

    [7]Wendong Lu#, Zhengyong Zhu#, Kaifei Chen#, Menggan Liu, Bok-Moon Kang, Xinlv Duan, Jiebin Niu, 

    Fuxi Liao, Wang Dan, Xie-Shuai Wu, Joohwan Son, De-Yuan Xiao, Gui-Lei Wang, Abraham Yoo, Kan-Yu 

    Cao, Di Geng, Nianduan Lu, Guanhua Yang*, Chao Zhao*, Ling Li*, and Ming Liu, “First Demonstration of 

    Dual-Gate IGZO 2T0C DRAM with Novel Read Operation, One Bit Line in Single Cell, ION =1500 μA/

    μm@VDS =1V and Retention Time>300s”, 2022 IEEE International Electron Devices Meeting, 2022. *通讯作

    者. (High Ranked Student Paper)

    [8]Menggan Liu, Congyan Lu, Guanhua Yang*, Weizhuo Gan, Songang Peng, Zhenhua Wu, Jiebin Niu, 

    Jiawei Wang, Lingfei Wang, Mengmeng Li, Di Geng, Nianduan Lu, Wei Cao, Ling Li, Deji Akinwande and 

    Ming Liu, “Analog Monolayer MoS2 Transistor with Record-high Intrinsic Gain (>100 dB) and Ultra-low 

    Saturation Voltage (<0.1 V) by Source Engineering”, 2021 IEEE Symposium on VLSI Technology, 2021. *通

    讯作者.

    [9]Guanhua Yang, Jiebin Niu, Congyan Lu, Rongrong Cao, Jiawei Wang, Ying Zhao, Xichen Chuai, 

    Mengmeng Li, Di Geng, Nianduan Lu , Qi Liu, Ling Li*, and Ming Liu*, “Scaling MoS 2 NCFET to 83 nm with 

    Record-low Ratio of SS ave /SS Ref .=0.177 and Minimum 20 mV Hysteresis”, 2020 International Electron 

    Devices Meeting, 2020.

    [10]Guanhua Yang, Yan Shao, Jiebin Niu, Xiaolei Ma, Congyan Lu, Wei Wei, Xichen Chuai, Jiawei Wang,

     Jingchen Cao, Hao Huang, Guangwei Xu, Xuewen Shi, Zhuoyu Ji, Nianduan Lu, Di Geng, Jing Qi, Yun   Cao, Zhongliu Liu, Liwei Liu, Yuan Huang, Lei Liao, Weiqi Dang, Zhengwei Zhang, Yuan Liu, Xidong Duan, Jiezhi Chen, Zhiqiang Fan, Xiangwei Jiang, Yeliang Wang*, Ling Li*, Hong-Jun Gao, Xiangfeng Duan* & Ming Liu*, “Possible Luttinger liquid behavior of edge transport in monolayer transition metal dichalcogenide crystals”, Nature Communications, 2020. 


    专利申请:

    获奖及荣誉:

  • 1.VLSI会议Best Demo Paper Award(2024年)

    2.IEEE EDL Golden Reviewer(2023年)

    3.Wiley Open Science Excellent Author Program(2023年)

    4.中国科学院微电子研究所十佳先进工作者(2022年)